| Address | R/W | Description |
|---|
00h
：
0Eh | R |
Keyboard matrix
| ＼ |
D0 |
D1 |
D2 |
D3 |
D4 |
D5 |
D6 |
D7 |
| 00h |
0 |
1 |
2 |
3 |
4 |
5 |
6 |
7 |
| 01h |
8 |
9 |
* |
+ |
= |
． |
， |
RETURN |
| 02h |
@ |
A |
B |
C |
D |
E |
F |
G |
| 03h |
H |
I |
J |
K |
L |
M |
N |
O |
| 04h |
P |
Q |
R |
S |
T |
U |
V |
W |
| 05h |
X |
Y |
Z |
[ |
￥ (\) |
] |
^ |
- |
| 06h |
0 |
1 |
2 |
3 |
4 |
5 |
6 |
7 |
| 07h |
8 |
9 |
： |
； |
， |
． |
/ |
＿ |
| 08h |
HOME
CLR |
↑ |
→ |
INS
DEL |
GRPH |
カナ (Kana) |
SHIFT |
CTRL |
| 09h |
STOP |
f.1 |
f.2 |
f.3 |
f.4 |
f.5 |
SPACE |
ESC |
| 0Ah |
HTAB |
↓ |
← |
HELP |
COPY |
- |
/ |
CAPS
LOCK |
| 0Bh |
ROLL
UP |
ROLL
DOWN |
|
|
|
|
|
|
| 0Ch |
f.6 |
f.7 |
f.8 |
f.9 |
f.10 |
BS |
INS |
DEL |
| 0Dh |
変換 (Conversion) |
決定 (Decision) |
PC |
全角 (Full-width) |
|
|
|
|
| 0Eh |
RETURN
(Main) |
RETURN
(Numeric keypad) |
SHIFT
(Left) |
SHIFT
(Right) |
|
|
|
(0)※ |
■ Colored cells are numeric keypad keys.
※ Always 0 for keyboards after FH
Keys from 0Ch to 0Eh are only available on FH and later keyboards.
|
| 10h | W |
Printer data output and calendar clock (μPD1990AC) output
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|
| Signal | Printer data output |
|---|
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|
| Signal |
| CDO | C2 | C1 | C0 |
|---|
| C2, C1, C0 | Command output to μPD1990AC |
|---|
| CDO | Data output to μPD1990AC |
|---|
|
| 20h | R/W |
USART (μPD8251C) data port
|
| 21h | R/W |
USART (μPD8251C) control port
|
| Address | R/W | Description |
|---|
| 30h | W |
System control port
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|
| Signal |
|
BS |
MTON |
CDS |
COLOR |
40 |
|---|
| BS |
USART channel control |
00: CMT 600 baud
01: CMT 1200 baud
10: RS-232C
11: RS-232C |
| MTON |
Motor control |
0: Motor OFF
1: Motor ON |
| CDS |
Carrier control |
0: Space (1200 Hz)
1: Mark (2400 Hz) |
| COLOR |
Text screen color mode |
0: Color mode
1: Black and white mode |
| 40 |
Columns mode |
0: 40 columns mode
1: 80 columns mode |
|
| R |
Mode select (dip switch status)
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|
| Signal |
|
SW1-S5 |
SW1-S4 |
SW1-S3 |
SW1-S2 |
SW1-S1 |
SW4-S1 |
|---|
| SW1-S5 |
When receiving DEL code |
0: Process
1: Ignore |
| SW1-S4 |
S-parameter |
0: Enabled
1: Disabled |
| SW1-S3 |
Number of text lines |
0: 25 lines
1: 20 lines |
| SW1-S2 |
Number of text columns |
0: 80 columns
1: 40 columns |
| SW1-S1 |
Startup mode |
0: Terminal mode
1: BASIC mode |
| SW4-S1 |
BASIC mode |
0: N-BASIC
1: N88-BASIC |
|
| 31h | W |
System control port
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|
| Signal |
|
25LINE |
HCOLOR |
GRAPH |
RMODE |
MMODE |
200LINE |
|---|
| 25LINE |
High resolution CRT 25 lines mode control |
0: All modes except high resolution CRT 25 lines mode
1: High resolution CRT 25 lines mode |
| HCOLOR |
Graphics screen color mode |
0: Black and white mode
1: Color mode |
| GRAPH |
Graphics control |
0: Do not display the graphics screen
1: Display graphics screen |
| RMODE |
ROM mode |
0: N88-BASIC mode
1: N-BASIC mode |
| MMODE |
RAM mode |
0: ROM/RAM mode
1: 64K RAM mode |
| 200LINE |
Graphics control in high resolution CRT mode |
0: 640×400 dots mode
1: 640×200 dots mode |
|
| R |
Mode select (dip switch status)
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|
| Signal |
SW4-S2 |
SW3-S0 |
SW2-S6 |
SW2-S5 |
SW2-S4 |
SW2-S3 |
SW2-S2 |
SW2-S1 |
|---|
| SW4-S2 |
V1/V2 mode |
0: V2 mode
1: V1 mode |
| SW3-S0 |
High speed mode |
0: Standard mode (V1S)
1: High speed mode (V1H, V2) |
| SW2-S6 |
Communication method |
0: Half duplex
1: Full duplex |
| SW2-S5 |
X-parameter |
0: Enabled
1: Disabled |
| SW2-S4 |
Stop bit length |
0: 2 bits
1: 1 bit |
| SW2-S3 |
Data bit length |
0: 8 bits
1: 7 bits |
| SW2-S2 |
Parity polarity |
0: Even number
1: Odd number |
| SW2-S1 |
Parity check |
0: With parity
1: No parity |
|
| 32h | R/W |
Mode specification (Since it is not present in PC-8801mkII or earlier, please check SR or later before accessing)
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|
| Signal |
SINTM |
GVAM |
PMODE |
TMODE |
AVC |
EROMSL |
|---|
| SINTM |
Sound interrupt mask |
0: Enable sound interrupts
1: Disable sound interrupts |
| GVAM |
Graphics VRAM access mode |
0: Independent access mode
1: Extended access mode |
| PMODE |
Palette mode |
0: Digital 8 colors mode
1: Analog 512 colors mode |
| TMODE |
Fast RAM access mode
(Only valid in V1H, V2 mode) |
0: F000h to FFFFh access high-speed RAM
1: F000h to FFFFh access main RAM |
| AVC |
Screen output mode |
00: TV/Video Out
01: (Prohibited)
10: Computer output
11: Option mode |
| EROMSL |
Built-in expansion ROM bank selection
(4th ROM) |
00: Bank 0
01: Bank 1
10: Bank 2
11: Bank 3 |
|
| 34h | W |
Extended access mode ALU control
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|
| Signal |
|
ALU21 |
ALU11 |
ALU01 |
|
ALU20 |
ALU10 |
ALU00 |
|---|
ALU01:ALU00
ALU11:ALU10
ALU21:ALU20 |
Graphics ALU mode (GVRAM0)
Graphics ALU mode (GVRAM1)
Graphics ALU mode (GVRAM2) |
00: Bit reset
01: Bit set
10: Bit inversion
11: No operation |
|
| 35h | W |
Extended access mode GVRAM control
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|
| Signal |
GAM |
|
GDM |
|
PLN2 |
PLN1 |
PLN0 |
|---|
| GAM |
GVRAM access mode |
0: Main RAM access
1: GVRAM access |
| GDM |
Graphics data multiplexer control |
00: Write ALU output data to 3 planes simultaneously
01: Write data / Read in the previous read cycle to 3 planes simultaneously
10: Write the GVRAM1 data / Read in the previous read cycle to GVRAM0.
11: Write the GVRAM0 data / Read in the previous read cycle to GVRAM1. |
| PLN2 |
GVRAM2 comparison data |
| PLN1 |
GVRAM1 comparison data |
| PLN0 |
GVRAM0 comparison data |
|
| Address | R/W | Description |
|---|
| 40h | W |
Strobe port
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|
| Signal |
FBEEP |
JOP1 |
BEEP |
GHSM |
CLDS |
CCK |
CSTB |
PSTB |
|---|
| FBEEP |
Sound output |
Output port waveform as audio |
| JOP1 |
General purpose output port |
Joystick port output (pin 8) |
| BEEP |
BEEP sound control |
0: BEEP OFF
1: BEEP ON |
| GHSM |
Graphics high speed mode
(Only valid in V1S mode) |
0: Standard mode
1: High speed mode |
| CLDS |
CRT I/F synchronous control |
0: Synchronization bit OFF
1: Synchronization bit ON |
| CCK |
Shift clock for calendar clock |
0: Clock OFF
1: Clock ON |
| CSTB |
Calendar clock strobe |
0: Strobe OFF
1: Strobe ON |
| PSTB |
Printer strobe |
0: Strobe ON
1: Strobe OFF |
|
| R |
System mode sense
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|
| Signal |
|
VRTC |
CDI |
SW2-S7 |
DCD |
SHG |
BUSY |
|---|
| VRTC |
Vertical retrace signal from CRTC (μPD3301AC) |
0: Vertical display period
1: Vertical retrace period |
| CDI |
Data from calendar clock (μPD1990AC) |
| SW2-S7 |
Disk boot mode |
0: Boot from disk
1: Do not boot from disk |
| DCD |
RS-232C data carrier detection |
0: Carrier OFF
1: Carrier ON |
| SHG |
High resolution CRT mode |
0: High resolution CRT mode (24 kHz)
1: Standard CRT mode (15kHz) |
| BUSY |
Printer BUSY |
0: Ready
1: Busy |
|
| 44h | R/W |
FM sound control
Before FR/MR: OPN
FH/MH and later: OPNA SSG/FM1-3 |
| 45h | R/W |
FM sound data
Before FR/MR: OPN
FH/MH and later: OPNA SSG/FM1-3 |
| 46h | R/W |
FM sound control
FH/MH and later only: OPNA ADPCM/FM4-6 |
| 47h | R/W |
FM sound data
FH/MH and later only: OPNA ADPCM/FM4-6 |
| Address | R/W | Description |
|---|
| 50h | R/W |
CRTC (μPD3301AC) control port |
| 51h | R/W |
CRTC (μPD3301AC) control port |
| 52h | W |
Background color control (8-color digital RGB)
| BGGRB |
Specify background color |
|
| 53h | W |
Screen display control
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|
| Signal |
|
G2DS |
G1DS |
G0DS |
TEXTDS |
|---|
| G2DS |
GVRAM2 display |
0: Displayed
1: Hidden |
| G1DS |
GVRAM1 display |
0: Displayed
1: Hidden |
| G0DS |
GVRAM0 display |
0: Displayed
1: Hidden |
| TEXTDS |
Text screen display |
0: Displayed
1: Hidden |
Set G2DS to 1 in 640×400 dot mode.
In color graphics mode, the graphics screen is displayed regardless of GxDS settings
|
54h
：
5Bh | W |
Palette
- 8 colors mode
- 512 colors mode
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|
| Signal |
0 | 0 | PR2 | PR1 | PR0 | PB2 | PB1 | PB0 |
|---|
| 0 | 1 |
| PG2 | PG1 | PG0 |
| 1 | 0 | BR2 | BR1 | BR0 | BB2 | BB1 | BB0 |
| 1 | 1 |
| BG2 | BG1 | BG0 |
| PR[2:0] |
Red level |
| PB[2:0] |
Blue level |
| PG[2:0] |
Green level |
| BR[2:0] |
Background color red level |
| BB[2:0] |
Background color blue level |
| BG[2:0] |
Background color green level |
|
| 5Ch | W |
GVRAM independent access mode bank selection
GVRAM0 (blue plane) selection |
| R |
GVRAM bank status
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|
| Signal |
|
G2 |
G1 |
G0 |
|---|
| G2 |
GVRAM2 status |
0: Not selected
1: Selected |
| G1 |
GVRAM1 status |
0: Not selected
1: Selected |
| G0 |
GVRAM0 status |
0: Not selected
1: Selected |
|
| 5Dh | W |
GVRAM independent access mode bank selection
GVRAM1 (red plane) selection |
| 5Eh | W |
GVRAM independent access mode bank selection
GVRAM2 (green plane) selection |
| 5Fh | W |
GVRAM independent access mode bank selection
Main RAM selection |
| Address | R/W | Description |
|---|
60h
：
68h | R/W |
DMAC (μPD8257C-5) control/status port |
| 6Eh | R |
CPU clock mode
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|
| Signal |
8 MHz/4 MHz |
|
|---|
| 8 MHz/4 MHz |
CPU clock mode |
0: 8 MHz
1: 4 MHz |
|
| 6Fh | R/W |
RS-232C baud rate (FH or later)
| BR | Baud rate |
| 0000 | 75 |
| 0001 | 150 |
| 0010 | 300 |
| 0011 | 600 |
| 0100 | 1200 |
| 0101 | 2400 |
| 0110 | 4800 |
| 0111 | 9600 |
| 1000 | 19200 |
| 1001〜1111 | Invalid |
|
| 70h | R/W |
Text window offset address.
Upper 8 bits of text window offset address. |
| 71h | R/W |
Expansion ROM selection
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|
| Signal |
EROM7 |
EROM6 |
EROM5 |
EROM4 |
EROM3 |
EROM2 |
EROM1 |
IEROM |
|---|
| EROM7 |
Expansion ROM7 Selection |
0: Selected
1: Not selected |
| EROM6 |
Expansion ROM6 selection |
0: Selected
1: Not selected |
| EROM5 |
Expansion ROM5 selection |
0: Selected
1: Not selected |
| EROM4 |
Expansion ROM4 selection |
0: Selected
1: Not selected |
| EROM3 |
Expansion ROM3 selection |
0: Selected
1: Not selected |
| EROM2 |
Expansion ROM2 selection |
0: Selected
1: Not selected |
| EROM1 |
Expansion ROM1 selection |
0: Selected
1: Not selected |
| IEROM |
Expansion ROM0 selection (4th ROM) |
0: Selected
1: Not selected |
Do not set multiple bits to 0 at the same time
When all bits are 1, main ROM is selected.
|
| 78h | W |
Increment text window offset address by 1 |
| Address | R/W | Description |
|---|
| A8h | R/W |
FM sound source control (Soundboard II)
OPNA SSG/FM1-3 |
| A9h | R/W |
FM sound source data (Soundboard II)
OPNA SSG/FM1-3 |
| AAh | W |
Soundboard II interrupt mask
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|
| Signal |
S2INTM |
|
|---|
| S2INTM |
Soundboard II interrupt mask |
0: Enable sound interrupts
1: Disable sound interrupts |
|
| ACh | R/W |
FM sound source control (Soundboard II)
OPNA ADPCM/FM4-6 |
| ADh | R/W |
FM sound source data (Soundboard II)
OPNA ADPCM/FM4-6 |
| Address | R/W | Description |
|---|
| E2h | W |
Expanded RAM read/write control
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|
| Signal |
|
WREN |
|
RDEN |
|---|
| WREN |
Extended RAM write control |
0: Cannot be written
1: Writable (write accesses from 0000h to 7FFFh are performed to expanded RAM) |
| RDEN |
Extended RAM read control |
0: Cannot be read
1: Readable (read accesses from 0000h to 7FFFh are performed to expansion RAM) |
|
| R |
Expansion RAM read/write control status
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|
| Signal |
|
WREN |
|
RDEN |
|---|
| WREN |
Extended RAM write control status |
0: Writable
1: Cannot be written |
| RDEN |
Extended RAM read control status |
0: Readable
1: Cannot be read |
|
| E3h | R/W |
Expansion RAM bank selection
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|
| Signal |
|
CARD |
BANK |
|---|
| CARD |
Card number |
00: Card 0 (M series expansion 128 KB RAM)
01: Card 1
10: Card 2
11: Card 3 |
| BANK |
Bank number |
00: Bank 0
01: Bank 1
10: Bank 2
11: Bank 3 |
|
| E4h | W |
Interrupt level setting
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|
| Signal |
|
SGS |
B2 |
B1 |
B0 |
|---|
| SGS |
Control of status register |
0: Interrupt compared to interrupt level
1: Interrupt by priority |
| B[2:0] |
Setting the interrupt level |
| Interrupt level | Interrupt source |
|---|
| 0 (Highest) | RS-232C reception interrupt |
| 1 | VRTC interrupt |
| 2 | 1/600 second timer interrupt |
| 3 | INT4 |
| 4 | Sound interrupt |
| 5 | INT2 |
| 6 | FDINT1 |
| 7 (Lowest) | FDINT2 |
|
Example: If you set E4h to 03h, interrupts of level 3 or lower (3 to 7) will not occur.
|
| E6h | W |
Interrupt mask
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|
| Signal |
|
RXMF |
VRMF |
RTMF |
|---|
| RXMF |
USART (RS-232C) reception interrupt mask |
0: Disabled
1: Enabled |
| VRMF |
VRTC interrupt mask |
0: Disabled
1: Enabled |
| RTMF |
1/600 second timer interrupt mask |
0: Disabled
1: Enabled |
|
| E8h | W |
Set Kanji ROM address lower 8 bits. |
| R |
Read the right 8 bits of the Kanji ROM font (even lines for half-width and quarter-width characters). |
| E9h | W |
Set Kanji ROM address upper 8 bits. |
| R |
Read the left 8 bits of the Kanji ROM font (odd lines for half-width and quarter-width characters). |
| EAh | W |
Start reading Kanji ROM. |
| EBh | W |
End reading Kanji ROM. |
| ECh | W |
Set second level kanji ROM address lower 8 bits. |
| R |
Read the right 8 bits of the second level Kanji ROM font. |
| EDh | W |
Set second level kanji ROM address upper 8 bits. |
| R |
Read the left 8 bits of the second level Kanji ROM font. |
| Address | R/W | Description |
|---|
| FCh | R/W |
Disk subsystem I/F 8255 port A
In the standard state, it is a data reception port from the subsystem. |
| FDh | R/W |
Disk subsystem I/F 8255 port B
In the standard state, it is a data transmission port to the subsystem. |
| FEh | R/W |
Disk subsystem I/F 8255 port C
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|
| R/W | W | R |
|---|
| Signal |
ATN |
DAC |
RFD |
DAV |
|
DAC |
RFD |
DAV |
|---|
| ATN |
W |
Attention |
Set to 1 when sending a command to the subsystem or to interrupt a command |
| DAC |
Data Accepted |
Set to 1 after fetching data from the subsystem |
| RFD |
Ready For Data |
Set to 1 when requesting data from the subsystem |
| DAV |
Data Valid |
Set to 1 after outputting data to port B |
| DAC |
R |
Data Accepted |
Becomes 1 after the subsystem picks up data |
| RFD |
Ready For Data |
Becomes 1 when the subsystem requests data |
| DAV |
Data Valid |
Becomes 1 after data is output to port A |
|
| FFh | W |
Disk subsystem I/F 8255 control |